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Source code


Name: pit
Created: Apr 13, 2009
Updated: Feb 10, 2010
SVN Updated: Oct 25, 2011

Other project properties

Category: Other
Language: Verilog
Development status: Beta
Additional info: Design done , Specification done
WishBone Compliant: Yes
License: BSD


The Programmable Interval Timer Module, PIT, is a simple timer to generate a
periodic signal for a microcontroller system. This signal may be used for
a variety of purposes such as triggering the start of an Analog to Digital or
Digital to Analog conversion, as a periodic system interrupt, real time clock
update, or to synchronize the start of various other hardware processes.


• 16 bit Main Counter with programmable modulo
• 15 bit Prescale Counter with programmable modulo selections
• Slave mode for synchronizing multiple PIT modules
• Interrupt or bit-polling
• Static synchronous design
• Fully synthesizable
• Parameterized so each instance can be optimized for size