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Source code


Name: 16x2_lcd_controller
Created: Jul 29, 2012
Updated: Nov 28, 2012
SVN Updated: Nov 28, 2012

Other project properties

Category: Other
Language: VHDL
Development status: Stable
Additional info: Design done , FPGA proven
WishBone Compliant: No
License: LGPL


Controller for 16 character - 2 line LCD displays as used on various Xilinx evaluation boards.


- 4-bit LCD data interface
- One 128bit-wide std_logic_vector input for each diplay line (16x8bit=128). Everything you send to those inputs goes directly to the display.


- Tested on Xilinx ML501 and ML507
- Virtex5: 37 flip flops, 228 LUTs, >300MHz