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Source code


Name: present
Created: May 5, 2011
Updated: Sep 17, 2014
SVN Updated: Sep 17, 2014

Other project properties

Category: Crypto core
Language: VHDL
Development status: Stable
Additional info: Design done , FPGA proven , Specification done
WishBone Compliant: No
License: LGPL


Present is a lightweight block cipher dedicated to implement in Hardware. It was developed by Knudsen team.

This cipher operates on the 64 bit text with use of 80 bit key. It uses S/P blocks and xor operations for encryption and key update through 32 rounds.

In this project I created:
- Present module dedicated to 32 bit Hardware (32 bit I/O and working under state machine)
   This is much for 'archive' state due to it was part of my students project, and it is not a 'pure' implementation of PRESENT. - "Pure" Present implementation "as is" in the Knudsen article
- Present cipher Decoder
- Some helpful programs written in Java used for testing VHDL modules
- Some modules used for testing communication with PC
- Full documentation for each subproject

These modules were tested on Digilent Spartan 3E Starter Boart (Spartan XC3S500E) - except 32 bit I/O version

If You have any questions write me an email gajos@opencores.org .