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Source code


Name: fixed-point-sqrt
Created: Mar 13, 2015
Updated: Mar 16, 2015
SVN Updated: Mar 16, 2015

Other project properties

Category: Arithmetic core
Language: VHDL
Development status: Alpha
Additional info:
WishBone Compliant: No
License: LGPL


VHDL project for a Square Root Unit (SRU) for 32-bit fixed point data. The unit implements the Goldschmidt recursion algorithm. It is pipelined with Initiation Interval of 1 clock cycle, and it perform the computation of a single square root with a latency of 3 clock cycles.
The design has been tested on 45nm ASIC library.