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Source code


Name: bw_tiff_compression
Created: Nov 28, 2013
Updated: Jan 20, 2014
SVN Updated: Jan 7, 2014

Other project properties

Category: Video controller
Language: VHDL
Development status: Stable
Additional info: Design done , FPGA proven
WishBone Compliant: No
License: LGPL


This project considers a hardware implementation of the CCITT group 4(also known as fax4 or tiff) compression algorithm written in vhdl. The design as it is available compresses camera data into tiff format and transmits over RS232 to a graphical client application developed in C++,Qt that stores the received tiff stream into a file and displays the image. The design is developed and tested on the Digilent Nexys2-1200(spartan-3E) and Atlys(spartan-6) board in combination with the Aptina MT9D131 Image Sensor Headboard.
Future extensions: Region of interest coding and change coding.