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Source code


Name: apb_mstr
Created: Apr 14, 2011
Updated: Aug 3, 2014
SVN Updated: Jul 3, 2011

Other project properties

Category: Testing / Verification
Language: Verilog
Development status: Alpha
Additional info:
WishBone Compliant: No
License: LGPL


Generic APB master stub. Based on an AXI master stub and an AXI2APB bridge. Supports both APB and APB3 protocols (APB3 is with pready and pslverr signals). The design is built according to input parameters: address bits, protocol type, etc. The source files are written in RobustVerilog, a free RobustVerilog parser can be downloaded from http://www.provartec.com/edatools