Created: Dec 31, 2009
Updated: Jan 6, 2010
SVN Updated: Jan 3, 2010
Other project properties
Development status: Beta
WishBone Compliant: No
Norwegian University of Science and Technology
This project came to be because of the course "TDT4295 - Computer Design, Project", due to the Institute of Computer and Information Science at The Norwegian University of Science and Technology . The project was supervised by Assoc. Prof. Morten Hartmann
What is this?
IGOR is in a complete system including:
* A PCB with all the components of the system: FPGA, AVR microcontroller, IO-units, Memory... the works.
* An implemented processor running on the FPGA.
* Several IO units, connected to the main processor through an AVR mircrocontroller through a parallel bus.
The processor is a microprogrammed processor, and the ISA resembles Lisp. The processor running the microprogram is RISC-like, and there are currently two versions in the repository: a multicycle processor which has been run in the FPGA on the full system, and a pipelined processor which has not been tested on development boards.
Calling it a complete LISP-machine at the lowest level is a misnomer, as you might expect. Even though there are some customizations like support for type-checking of operands, the lowest level remains a rather straight-forward MIPS-like RISC machine and the microinstruction-set are not far from what you would come to expect from any RISC processor. Features like all the original LISP-machines had, like hardware-supported GC is not present. The microprogram and thus the ISA, however, is very much a Lisp machine: it implements garbage collection, dynamic typing and many other features one has come to except from a LISP.
Who contributed, and will it grow?
The original project (hereby dubbed IGORv1) was started by a group of students in the fall of 2008 as a school-project. The project finished successfully. The participants were: Øystein Skartsæterhagen, William Wai Man Young, Tor Arne Lye, Ruben Spaans, Martin Tverdal, Maria Johansen, Odd Rune S. Lykkebø, Ulf Lilleengen, Kjetil W. Oftedal, Kai Hugo H. Endresen, Jens Ådne Rydland, Georgy Ushakov, Eirik A. Nygaard, Thomas K. Adamcik.
After this project finished, there was an additional project in the fall of 2009, where Odd Rune S. Lykkebø took out the processor implementation and implemented a pipelined design and built a file system.
The current state of the project is what is available here. There will be more work done on the platform, and everyone is invited to join in if they can manage to get things running. Since we created an original PCB for the project, getting things up and running in a test system is potentially hard to do. Odd Rune will however assist anyone who wishes to do modifications to IGOR and run them on the original PCB. Of course, you're free to print your own-- gerbers and everything is included in the source files.