Go Back

Source code


Name: zpu
Created: Jan 2, 2008
Updated: Sep 14, 2009
SVN Updated: Sep 8, 2009

Other project properties

Category: Processor
Language: Other
Development status: Stable
Additional info: Design done , FPGA proven , Specification done
WishBone Compliant: Yes

The worlds smallest 32 bit CPU with GCC toolchain

Read about some of the professional uses of the ZPU: http://www.zylin.com/zpuexpertise.html
The ZPU is a small, portable CPU core with a GCC toolchain and eCos RTOS support.
The ZPU has a FreeBSD license for the HDL and GPL for the rest. This allows deployments to implement any version of the ZPU they want without running into commercial problems, but if improvements are done to the architecture as such, then they need to be contributed back.
One strength of the ZPU is that it is tiny and therefore easy to implement from scratch to suit specialized needs and optimizations.
The ZPU is under git version control(opencores will probably get git source control eventually), meanwhile more information, complete source and more examples can be found at http://opensource.zylin.com/zpu.htm
Per Jan 1. 2008, Zylin has the Copyright for the ZPU, i.e. Zylin is free to decide that the ZPU shall have a BSD license for HDL + GPL for the rest.
Øyvind Harboe
General Manager


- Small size: 442 LUT @ 95 MHz after P&R w/32 bit datapath Xilinx XC3S400
- Verilog and VHDL implementations available
- Wishbone
- Code size 80% of ARM Thumb
- GCC toolchain(GDB, newlib, libstdc++)
- FreeRTOS support
- eCos embedded operating system support

Hello world example

1. download the latest svn snapshot http://www.opencores.org/download,zpu
2. tar -xzvf zpu_latest.tar.gz
3. In zpu/readme.txt you find information on how to run a
hello world ModelSim example.
4. Run the simulation in ModelSim, this outputs a log.txt which prints
"Hello world".
5. Modify hello.c, rebuild and run in ModelSim(also described in readme.txt)
Other smoketests:
Look in the example/simzpu_small.do simulation file and use zpu_small_core.vhd as the top level file in your synthesis software. You'll then need to pull in zpu_config.vhd, hello_world.vhd, and zpupkg.vhd. You now have a standalone ZPU that can be used to smoketest synthesis and do some crude resource measurements relatively easily in just about any synthesis software. Adjust zpu_config.vhd to use DontCareValue='X' and maxAddrBitBRAM to fit the RAM you want to assign to the ZPU for your synthesis test.
Normally such synthesis GUI/IDE's should allow you to pick some FPGA part and choose some default pins for the top level ZPU. This will allow you to run some smoketest on synthesis and get a feel for timing constraints, size, etc. after place and route.
This will either "just work" as the hello_world.vhd uses inference to implement BRAM's, or you will have to implement a dual port RAM according to the FPGA architecture and synthesis software requirements. You may run into some small hickups with certain synthesis software, such as Synplify where you need to tweak the ZPU code to complete synthesis.
If you modify the ZPU, it is possible to run a verification procedure against larger applications to check that the modifications do not introduce subtle bugs.


The ZPU source is kept in a git repository rather than CVS(OpenCores.org does not yet support git).

The OpenCores CVS server contains a snapshot of the source code before it was moved to git.