Created: May 6, 2011
Updated: May 25, 2011
SVN Updated: May 7, 2011
Other project properties
Development status: Planning
WishBone Compliant: No
Building team. If any beginner became inetersted in it, email me.
Pepelatz MISC is a very small 16-bite processor written on Verilog.
It can be used for learning Verilog HDL and computer low-level architecture.