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Source code


Name: oops
Created: Mar 25, 2012
Updated: Apr 3, 2012
SVN Updated: Apr 9, 2012

Other project properties

Category: Processor
Language: Verilog
Development status: Planning
Additional info:
WishBone Compliant: No
License: LGPL


OoOPs is intended to be a higher-performance alternative to other MIPS(TM)-compatible projects on OpenCores. Many of the other CPU cores are targeted for low resource utilization and/or higher energy efficiency. OoOPs will instead target higher performance (both frequency and IPC) through more aggressive pipelining and out-of-order execution. This means that OoOPs will be more resource intensive, especially due to the nature of out-of-order architectures. To help find better performance/area operating points for the user, many structure sizes and optional features/blocks will be either parametrized or removable through defines.