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Source code

Details

Name: oks8
Created: Jan 20, 2006
Updated: Jan 24, 2006
SVN Updated: Mar 10, 2009

Other project properties

Category: Processor
Language: Verilog
Development status: Alpha
Additional info:
WishBone Compliant: Yes
License: GPL

Description

The oks8 project is intended to provide a microcontroller in Verilog that like
the KS86C4204/C4208/P4208 microcontroller (Samsung Inc.). It is compatible
with the SAM87RI instruction set and has some changes to support uC/OS.
Two different top levels:
- Less cycles of each instruction
- 16bits program memory and data memory
SAM87RI, KS86C4208, etc. are Trademarks of Samsung Inc. I have no idea if
implementing this core will or will not violate patents, copyrights or cause
any other type of lawsuits. I provide this core AS IS, without any warranties.

Features

- Capable of executing all SAM87RI instruction set.
- 8bit external data bus width.
- 16bit (64Kb) program address space.
- 16bit (64Kb) data memory space.

Status

- Fully tested in software simulation running code compiled with SASM.
- Completed and verified on xilinx fpga.