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Source code

Details

Name: unconfuser
Created: Jun 4, 2009
Updated: Jun 23, 2009
SVN Updated: Jul 1, 2009

Other project properties

Category: Other
Language: Verilog
Development status: Beta
Additional info:
WishBone Compliant: No
License: LGPL

Description

Hi, Everyone, You can find detailed information about project in this pdf .
The pdf explains most of the things about the project like:
1. Port list for unconfuser.
2. Address for each pad.
3. Polynomials used for each pad.
4. Steps to be followed to code state machine.
5. Diagrams briefly explaining confuser and unconfuser working.
Hope this much information would be sufficient to grasp everything about project.
The project need to be optimized for number of gates, Have 12k count for now need to make it to around 8k. Hope it will be done in 2 weeks :)