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Source code


Name: simple_fm_receiver
Created: Jan 3, 2005
Updated: Mar 19, 2010
SVN Updated: Jun 27, 2010

Other project properties

Category: Other
Language: VHDL
Development status: Stable
Additional info: FPGA proven
WishBone Compliant: No
License: BSD

Simple FM Receiver

Simple implementation of FM Receiver to demodulate square wave signal modulated
in FM. This design uses PLL to demodulate FM modulated signal.


- Synthesizable
- This design can be synthesize using Xilinx 6.3i
- This design can be simulated and synthesized using http://asim.lip6.fr/recherche/alliance/ (Alliance 5.0)
- Simple
- Use it to understand PLL to see how FM Receiver works.
- Good for introduction in design process.
- Modular design, can be use for other design.