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Source code

Details

Name: big_counter
Created: Dec 20, 2007
Updated: Dec 20, 2009
SVN Updated: Mar 10, 2009

Other project properties

Category: Other
Language: VHDL
Development status: Beta
Additional info:
WishBone Compliant: No
License: GPL

Description

Uses the shift register technology to create a big counter, that gives out a pulse at the period specified as a generic

Features

Designed for Xilinx FPGA's, with SRL's.
An efficient way of generating a divide by n**16 counter, where N can be very big.

Status

basic counter in cvs