Created: Jun 10, 2011
Updated: Jul 20, 2012
SVN Updated: Jul 1, 2011
Other project properties
Development status: Stable
Additional info: FPGA proven
WishBone Compliant: No
The circuits found here implement digital leapfrog filters as described in http://en.wikibooks.org/wiki/Signal_Processing/Digital_Filters
>. All filters are of lowpass type. They are optimised in terms of area.
This kind of filter structure is the digital counterpart of an analog lumped-elements ladder filter. It simulates the functioning of an all-pole lowpass filter under the assumption of a large oversampling. The circuit implements the integral relations between voltages and currents of the capacitors and the inductances with the help of accumulators. This corresponds to simplify the Z-transform to z = 1 + sT.
The relative values of the filter coefficients specify the transfer function shape (Butterworth, Chebyshev, ...). The amplitude of the coefficients specify the cutoff frequency. In the circuits provided here, this amplitude is set by a shift value given as a generic.
The filter provided are
- a 3rd order Butterworth with no multiplier (coefficients are only shifts)
- a 6th and an 8th order Bessel with coefficients optimised to 2 shifts and an addition
- a generic filter where the coefficient multiplications are executed iteratively