Created: Sep 25, 2001
Updated: Dec 20, 2009
SVN Updated: Mar 10, 2009
Other project properties
Development status: Stable
WishBone Compliant: Yes
IrDA core that utilizes uart16550 core for 115.2Kbit/s IrDA communication. Required bit encoding/decoding is performed.
The 115.2 (SIR) mode should work alright.
There's also a lot of code for MIR and FIR, much faster communication modes. Yet they are not fully tested and are sure to contain a lot of bugs.
• Designed for all standard IR transceivers.
• Implements WISHBONE bus interface
• Up to 4Mbit communication speed
• Programmable clock selection
• Loopback option for testing
• Works with WISHBONE bus clock
• Can request DMA transfers
Currently, only 115.2 (SIR) mode is done well. Use irda_top_sir_only.v top-level module.
Faster modes (MIR, FIR) are not tested well but the specs and most of the code for them exist, just not tested and debugged well.